IDS Software Suite 4.96.1
The cameras use an integrated FPGA processor for pixel preprocessing. The diagram illustrates the sequence of preprocessing operations.
Fig. 370: Pixel preprocessing uEye SE USB 3.1 Gen 1
Operations marked with * are optional. Depending on the camera configuration they can be selected in the software.
Note on hardware debayering
•Hardware debayering can only be activated if a pixel clock lower than 200 MHz is set.
•The following color formats can be used for hardware debayering:
oRGB15
oRGB24
oRGB32
oRGB30 packed
oMono8
oMono10
oMono12
•Hardware debayering uses the standard filter mask (3x3).
•In hardware debayering the sensor is always operated in 12 bit mode. Even with the formats RGB15, RGB24 or RGB32, debayering takes place on the 12-bit raw data.
